Talks

Explore my latest research and contributions to the scientific community.

2025

Energieoptimiertes High-Performance Computing für Finite-Elemente-Simulationen in der Produktentwicklung (ENSIMA)

HPC-Statuskonferenz 2025, Göttingen, 2025

Dynamic Data Redistribution for Malleable MPI Frameworks through Virtual Topologies

4th EuroHPC Workshop on Dynamic Resources in HPC held in conjunction with Euro-Par 2025, August, 2025

2024

I/O Behind the Scenes: Bandwidth Requirements of HPC Applications With Asynchronous I/O

IEEE Cluster 2024, Kobe, Japan, Sep 27, 2024

Expert Talk II: Unveiling I/O Insights of HPC Applications Using the Metric Proxy and FTIO

4th Workshop on Re-envisioning Extreme-Scale I/O for Emerging Hybrid HPC Workloads, Kobe, Japan, Sep 24, 2024

Frequency Techniques for I/O

17th Scheduling for Large-Scale Systems Workshop, Aussois, France, June 27, 2024

Capturing Periodic I/O Using Frequency Techniques

IPDPS'24, San Francisco, USA, May 29, 2024

Introducing the Metric Proxy for Holistic I/O Measurements

HPC-IODC Workshop @ ISC High Performance, Hamburg, Germany, May 16, 2024

Frequency Techniques for I/O

HiPEAC, Munich, Germany, January 17, 2024

2023

I/O Behind the Scenes: Bandwidth Requirements of HPC Applications With Asynchronous I/O

IEEE Cluster 2024, Kobe, Japan, Sep 27, 2024

Expert Talk II: Unveiling I/O Insights of HPC Applications Using the Metric Proxy and FTIO

4th Workshop on Re-envisioning Extreme-Scale I/O, Kobe, Japan, Sep 24, 2024

Frequency Techniques for I/O

ADMIRE User Day, Barcelona, Spain, December 12, 2023

Modeling I/O of HPC Applications with Extra-P

ADMIRE User Day, Barcelona, Spain, December 12, 2023

Malleability Workstream Presentation

Textarossa EuroHPC Collaboration Workshop, Turin, Italy, June 7, 2023

Optimization Cycles Workstream Presentation

Textarossa EuroHPC Collaboration Workshop, Turin, Italy, June 7, 2023

Detecting Periodic I/O Behavior Using Frequency Techniques

Teratec Forum, Paris, France, June 1, 2023

Conquering Noise With Hardware Counters on HPC Systems

NHR PerfLab Seminar, April 18, 2023, online [Slides] [Video]

2022

Conquering Noise With Hardware Counters on HPC Systems

November 13, 2022

2021 - 2020

Towards Compositional Abstraction of Analog Neuronal Networks

CCWC, Jan 2021 (online)

Modeling Circuits with Parameter Variation by ELSA: Eigenvalue Based Linear Hybrid System Abstraction

17. GMM/ITG-Fachtagung ANALOG, Sep. 2020 (online)

Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets

ISVLSI, July 2020 (online)

2019

Automatic Modeling of Transistor Level Circuits by Hybrid Systems with Parameter Variable Matrices

SMACD, Lausanne, Switzerland, July 2019

Behavioral Modeling of Transistor-Level Circuits using Automatic Abstraction to Hybrid Automata

DATE, Florence, Italy, Mar 2019

2018

BAutomatic Abstraction of Analog Circuits to Hybrid Automata

16. GMM/ITG-Fachtagung Analog, Munich, Germany, 2018

Automatic Abstraction of Transistor Level Circuits to Hybrid Automata

Frontiers in Analog CAD (FAC), Vienna, Austria, 2018 (slides)